Fig. 2 Mapping structure (SONET)
∗1: Mounted MP0122A/B, ∗2: Mounted MP0121A
Justification
STS pointer, VT pointer, C, C1/C2
Measurement: NDF, +PJC, –PJC, Cons, C, C1/C2
Monitor TOH, POH, K1/K2, pointer, path trace (TIM alarms detectable), Tandem, payload
Signal of opposites polarity, regular with double, regular with missing, double of opposites polarity, 87-3/26-1 (normal, add, cancel),
Pointer sequence continuous pattern (normal, add, cancel), single pointer adjustment, maximum rate pointer burst, phase transient pointer burst,
initialize period polarity, cooldown period
Over head capture TOH/POH (any 1 byte), H1/H2, K1/K2
Dummy channel setting
Payload: Dummy, copy, mixed payload
Setting: POH, pathtrace, SS bit, Tandem
Simultaneous measurement
VT6SPE, VT2SPE, VT1.5SPE
Trouble search Auto search for errors/alarms in all measured channels
Measurement period: 0.5, 1, 2, 5, 10 s
Delay Measurement range: 0 to 999 µs, 1.0 to 999.9 ms, 1.0 to 10.0 s, time out
Display accuracy: ±5 µs (0.5, 1 s), ±50 µs (2, 5, 10 s)
Switching time measurement
Measurement range: 1 to 2000 ms, >2000 ms
Trigger
Internal: B1, B2, B3, BIP-2, REI-L, REI-P, REI-V, AIS-L, AIS-P, LOP-P, RDI-P, AIS-V, LOM-V, LOP-V, RDI-V, RFI-V, Bit
APS (K1/K2)
External: Measures trigger input signal (active high)
Threshold: Specify non-error alarm between 1 ms, 10 ms, 100 ms
Sequence generation: 2 to 64 word, repeat (8000 frame)
Sequence capture: 2 to 64 word, repeat (8000 frame)
Frequency measurement
Range: ±100 ppm, Accuracy: ±3.5 ppm (jitter unit not installed)
OH change: TOH/POH 1 byte, K1/K2, LOH, SOH, TOH, POH (except B1, B2, B3, BIP-2)
PTR 64 frame: STS pointer, VT pointer
Timing: Single, repeat (2 to 64)
Over head test Setting: PTR, NDF, +PJC, –PJC
OH BERT: TOH/POH 1 byte (exclude B1, B2, B3, BIP-2), D1-D3, D4-D12
Test pattern: 2
11
– 1, 2
15
– 1
OH add/drop: TOH/POH 1 byte, D1-D3, D4-D12 (exclude B1, B2, B3, BIP-2 additional type)
Japan mapping (option 09)
VT1.5SPE Signaling (8-multiframe, 64-multiframe setting)
Frame memory/capture
Memory size: 64 frame (156M, 622M, Option 13), 64 frame (MU150008A-01/150009A-01/150010A-01, 2.5G),
26 frame (MU150000A-01, 2.5G/10G)
Insert/extract Bit rate: 10G (52M, 156M, 622M), 2.5G (52M, 156M, 622M)
Payload offset ±100 ppm/0.1 ppm step
Auxiliary interface Clock sync output, trigger input, trigger output, DCC interface (V.11), orderwire, receive clock output
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